This invention relates to semiconductor fabrication tools, and more particularly, to a method for generating Ag patterns on photomasks or reticles used in the fabrication of semiconductor devices.
Semiconductor devices are used in a variety of electronic applications, such as personal computers and cellular phones, for example. Semiconductor fabrication processes typically utilize photolithographic processing to pattern areas of a surface of a semiconductor wafer. Photolithography typically includes applying a photoresist material to the surface of a semiconductor device, and then patterning the photoresist by exposing the photoresist to light, typically ultraviolet light, to cross-link the resist material, e.g., in a negative resist process. Cross-linking prevents a reaction with a developer which develops away areas of the photoresist which were not cross-linked by exposure to the UV light. Other types of photoresists have chains broken by exposure, e.g., in a positive resist process, to ultraviolet light.
Photoresist layers on a semiconductor device are typically patterned using a photomask or reticle, referred to herein as a xe2x80x9cmaskxe2x80x9d. A mask functions as a shield to prevent light from passing through it in predetermined areas during photolithography. A mask typically comprises an opaque, or highly absorbent layer of material, usually a metal such as chromium or a chromium alloy, patterned in accordance with the patterning design to be projected onto the semiconductor wafer. The opaque or semi-opaque regions are formed on a transparent substrate usually quartz. The masks are used which may include and electron beam masks, and scattering masks and/or stencil masks, for example, scattering with angular limitation in projection electron beam lithography (SCALPEL).
The semiconductor industry in general is being driven to decrease the size of semiconductor devices. Miniaturization is generally needed to accommodate the increasing density of circuits necessary for today""s semiconductor products. With the trend towards decreasing feature sizes of semiconductor components, lithography masks are increasingly becoming more difficult to fabricate and inspect. Advanced semiconductor processing is very sensitive to the image quality provided by masks. The defect fabrication capability for masks is limited to a certain minimum feature size, which typically depends on the process and fabrication tools used to provide the pattern on the mask.
Masks may be patterned, or written, by sources such as laser pattern generators or electron beam pattern generators. Because masks typically include a multitude of features having dimensions below a micron in size, fabrication is typically performed using automated devices.
Referring to FIG. 1, a prior art lithography mask fabrication system 100 is shown that includes a stage 114 for positioning a mask or reticle 116 to be fabricated. An energy source 110 provides an energy beam such as a laser beam or electron beam adapted to write a pattern on mask 116 with a predetermined intensity of light or electrons. The mask 116 is preferably guided by a positioner or stage 114 according to a computer-generated image of the pattern to be written on the mask 116.
A blank mask 116 is provided having no pattern exists thereon. The mask 116 includes a light-absorbing opaque material, such as, chromium, molybdenum or their alloys, or metal oxides disposed on a transparent glass or quartz substrate. The mask 116 is mounted to a stage or positioner 114 or other positioning device. The stage 114 is capable of accurately positioning the mask 116, including rotations. A lens system 112 is disposed between the mask 116 and source 110, adapted to focus an energy beam generated by energy source 110. The energy source 110 preferably generates an energy beam, such as light in ultraviolet wavelengths or an electron beam with electrons having energies of about 50 keV or less, as examples. Energy source 110 may comprise, for example, an excimer laser. Lens system 112 controls the size and shape of a beam used to write a pattern on the mask 116.
During fabrication, source 110 generates an energy beam that is focused and shaped by lens system 112 that is adapted to direct the beam onto mask 116. Mask 116 is manipulated by translating and rotating stage 116 according to a pattern that may be stored in a memory 125 of a computer 120, for example. The processor 123 of the computer 120 sends signals to control the stage""s 114 motion to write the pattern stored in memory 125 on a resist layer. Source 110 may be controlled by processor 123. Processor 123 may be adapted to send signals to source 110 to turn the beam on and off in accordance with the pattern. Alternately, a shutter (not shown) may be used to halt the propagation of the beam.
Both laser and electron beam pattern generators have the capability of producing complex mask patterns, including those with narrow geometries, dense optical proximity correction (OPC) and phase shift masks (PSM). OPC helps compensate for lost light to ensure that the precise patterns are formed on a semiconductor wafer. For example, without OPC, a rectangle produce a pattern on a semiconductor wafer that appears oval because light tends to round on the edges. OPC is used to correct this phenomenon by adding tiny serifs, or lines, to the corners to ensure that the corners are not rounded, or moving a feature edge so wafer features are sized more accurately. Phase shift masks alter the phase of light passing through the photomask, and permit improved depth of focus and resolution on the wafer. Phase shifting helps reduce the distortion of line resolution of wafer surface irregularities.
Embodiments of the present invention achieve technical advantages as a method of fabricating lithography masks using an elliptical laser/electron beam to smooth rough edges of mask features and create elliptical and rounded features with smooth, curved edges.
In one embodiment, disclosed is a method of fabricating a mask for patterning a semiconductor wafer, comprising providing a mask blank including a substrate and an opaque material formed thereon, and patterning the opaque material with oval or rounded features using an elliptical-shaped energy beam.
In another embodiment, disclosed is a method of fabricating a mask for patterning a semiconductor device, comprising providing a substrate including an opaque material formed thereon, and forming a pattern on the opaque material, portions of the pattern having stair-step shaped edges. The stair-step shaped edges formed on the opaque material are reduced using an elliptical-shaped energy beam.
Also disclosed is a method of fabricating a mask for patterning a semiconductor device, comprising providing a substrate including a transparent material, depositing an opaque material over the substrate, and using a substantially circular-shaped energy beam to form a pattern including oval or rounded features on the opaque material, portions of the oval or rounded features including undesired stair-step shaped edges. The oval or rounded feature stair-step shaped edges are at least partially removing using an elliptical-shaped energy beam.
Further disclosed is a method of fabricating a semiconductor device, comprising providing a semiconductor wafer, and patterning the semiconductor wafer with a mask, the mask including oval or rounded features formed using an elliptical-shaped energy beam.
Also disclosed is a method of patterning a semiconductor wafer, comprising providing a semiconductor wafer having a surface and depositing a resist over the semiconductor wafer surface. The method includes patterning the resist with an energy beam, wherein the energy beam comprises a beam having an elliptical-shaped cross-section. The resist is used to pattern the wafer surface.
Advantages of embodiments of the invention include providing a method of creating oval and rounded features on a semiconductor device mask that are absent the stair-step edges resulting from laser/electron beam patterning using a beam having a circular cross-section. Memory semiconductor devices such as magnetic random access memory (MRAM) devices and dynamic random access memory (DRAM) devices particularly benefit from the ability to create elliptical shapes and patterns, maximizing memory cell performance. Furthermore, smoothing the edges of oval and rounded features with an elliptical-shaped laser/electron beam is faster, requires a lower power density, and patterns a larger surface area than using a circular cross-sectional energy beam, as in prior art processes. Prior art laser and electron beam sources may be used, by adjusting energy sources in accordance with embodiments of the present invention to create an elliptical cross-sectional beam.